Some offset between the metal interconnection and cells from Sillicon Ensemble to DFII Design Enviro

Discussion in 'Cadence' started by Min Pan, Jul 10, 2003.

  1. Min Pan

    Min Pan Guest

    Hello, everyone

    I used Sillicon Ensemble to do Standard Cell P&R. After I finished
    doing P&R, I streamed out the GDSII file and tried to stream into the
    DFII Design Environment.

    I can streamed in the GDSII successfully. However, there's some offset
    between the cells and the metal interconnections. So the metals in the
    cells and the interconnections are messed up. DRC failed.

    I looked through the map files used by SE and icfb. I found there's
    two layers called CELLM and CELL in the map file used by SE. But
    there's no such layers in the map file used in streaming in the GDSII.
    So those layers were skipped. I'm wondering if this could be the
    reason. I have tried to map those two layers to the layers called
    BNDRY in the map file used by icfb but it didn't work. The offset
    still exists there.

    What may be the cause of this problem? Any help is appreciated.


    Min Pan
    Min Pan, Jul 10, 2003
  2. Min Pan

    Rajeswaran M Guest

    Do you have "prBoundary" layer? If not entire bBox of the cell will be
    considered as boundary.
    Rajeswaran M, Jul 11, 2003
  3. Min Pan

    Han Speek Guest


    I'm not quite sure why one would use GDSII to go from SE to dfII. The
    normal way, as far as I'm aware, is to write out the design in DEF, and
    import that into dfII. I've never had a problem doing it that way !

    Streaming out the design from SE doesn't make sense anyway, as you don't
    have the full cell layouts there, only the abstract views....

    Best wishes,

    Han Speek, Jul 11, 2003
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