Dear All, I got some strange problems when doing LVS using Assura. There are s ome mismatched devices. When I open the device mismatch tools for detail, I found that some of the devices which are shown in the schematic info window are not found in layout(in the window of layout info). Howevere, I did see all these devices in the layout window. When I tried to view the netlist from Layout window(Assura->view netist), no netlist is shown and In the CIW: \a vuiOpenReference() \w *WARNING* Pattern "opppcres" not found. \w *WARNING* Pattern "available." not found. \r t Is there something I missed? Thanks a lot, Adam
<snip> I believe most LVS verification tools use a netlist to netlist comparison. They use the netlist generated from the schematic versus the netlist generated from the layout (boolean operations). So it would seem your problem may be more of a netlisting issue with the schematics?? Maybe there are some devices that are not defined somehow?? Would be interesting to see what your issue is, because I need to get more familiar with Assura because it is good and relatively cheap, and farely widely implemented.
