Matching problem between schematic and layout for RF ESD diodes

Discussion in 'Cadence' started by Xuning, Nov 17, 2006.

  1. Xuning

    Xuning Guest

    I am using the RF ESD diodes of 0. 13um UMC technology. But I can not
    pass the lvs check for my ESD circuitry. Then I found out that LVS
    check would fail for even a single diode with error message: "No
    matching ".SUBCKT" statement for DIOP_ESD_RF at line 25 in file
    *" and "Source could not be read".

    Does anyone use these RF ESD diodes (DIOP_ESD_RF, DIODN_ESD_RF) of
    0.13um UMC before? Are there same problems? And how to fix them?
    Thanks a lot.
    Xuning, Nov 17, 2006
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  2. Xuning

    Xuning Guest

    There is the definition of RF ESD diodes in library like all other NMOS
    and PMOS. The following are from * It did not recognize
    DIOP_ESD_RF in schematic, so there is no instance in source.


    Layout Source Component Type
    ------ ------ --------------
    Ports: 0 3 *

    Nets: 3 3

    Instances: 1 0 * DIOP_ESD_RF (3 pins)
    ------ ------
    Total Inst: 1 0

    * = Number of objects in layout different from number in source.

    "okguy дµÀ£º
    Xuning, Nov 18, 2006
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