How to transfer one foundry's GDSII data to another?

Discussion in 'Cadence' started by Harryzhu, Apr 6, 2005.

  1. Harryzhu

    Harryzhu Guest

    Hi,

    I wanna transfer one foundry's GDSII data to another one, and I have both
    of their design environment, how may I do the conversion? They give stream
    in or out map file, so I stream out with foundry one's map file under its
    environment, then stream in with foundry two's map file under new
    environment, but I get several layers lost.

    Someone tell me I should rewrite the map file. I should modify the 'layer
    number' and 'layer type' item in foundry one's map file, either I should
    change the 'layer name' and 'layer purpose' item in foundry two's map file.
    Both of them have more than two hundreds lines, and it's difficult to find
    which of them are used in the layout but don't miss everything, it's
    difficult to find the corresponding layer number or name for two design
    environment. How should I finish it?

    I have a question all along, I think there's no more help for those
    foundry supplying map file, but why are they supplied to customers? Maybe I
    don't know their real usage, or is ignored by me. Who may tell me the
    answer? Thanks for your help!

    Have a good day!

    Best Regards,

    Harryzhu
     
    Harryzhu, Apr 6, 2005
    #1
  2. Harryzhu

    G Vandevalk Guest

    The foundary output GDSII map must contain all of the info needed to
    fab the chip. It does not need to contain anything else.

    Often fab's will provide additional/different GDSII maps for verification.
    (bad practice, but done!)
    This often contains labeling data (pin info) and/or obstruction layers
    and/or
    markers for guiding drc/extract/lvs/fill etc.

    It is not in the Fab's interest to supply you with the stuff needed to fab
    elsewhere.


    I notice you have not said anything about converting
    pins/CDF/properties/schematics/devices/arrays/Pcells ...
    You are just scratching the surface here ...


    Good Luck

    p.s. Only 200 lpps ... I only start to worry when it gets over 1000 lpps;^)
    ....

    lpps - Layer Purpose Pairs in Cadence Lingo.

    - Gerry Vandevalk www.ictooling.com
     
    G Vandevalk, Apr 6, 2005
    #2
  3. Harryzhu

    keylinme Guest

    Where did you steal the original GDSII data from?
    Go back to them and steal a schematic.

    If you can steal the simulation models, that would be great.
    Oh, and be sure to steal the test vectors too!

    Once you have all that, resimulate in the new stolen process.
    Tweak the component sizes so that the circuit works in the new process.
    If you can use stolen circuit optimization tools, that will save you
    time.

    Once you have the circuit running in the new process, move on to the
    layout.
    Steal a layout migration tool or two and you'll be done in a jiffy.

    Verify after you have the schematic & layout in the new process.
    Stolen physical verification rule decks work great!

    After that, the new foundry will be glad to fab your 'designs'.
     
    keylinme, Apr 27, 2005
    #3
  4. Harryzhu

    keylinme Guest

    Where did you steal the original GDSII data from?
    Zhu Ying

    I just noticed you ALREADY stole the Verilog netlist!
    And your standard cells came from Artisan.
    So you still need to steal the primitive schematics.
    And you need to convert the Verilog to VHDL for your needs.
    But, you cracked the license for older Cadence software
    (they changed the licensing scheme just after your version).

    Also, the entire internet (not just comp.cad.cadence) is
    trying to help you with your dumb-ass questions. Many
    responses on the other newsgroups sum you up by asking:
    "Have you tried the obvious?"

    See these related posts by the same guy (Zhu Ying).

    "Harryzhu" Mar 8, 7:32 pm
    Is there any tool to convert netlist to schematic?
    "Harryzhu" Thu, 10 Mar 2005 09:09:39 +0800
    Where may I find SE's free training lessons?
    "Harryzhu" Thu, 24 Feb 2005 09:06:23 +0800
    Subject: Free CAD tools 'Alliance'
    "Harryzhu" Tue, 22 Feb 2005 09:37:43 +0800
    Where to find skill documents?
    "Harryzhu" Tue, 8 Mar 2005 18:55:14 +0800
    How could I backup 200G data on one LTO-1 tape?
    "Harryzhu" Fri, 11 Mar 2005 18:39:11 +0800
    I wanna transfer one library to another different foundry
    Hey Zhu,
    I could go on, and on, and on.

    Where did you steal the chip design data from?
    Where did you steal the software from?

    I suggest you create a brand new Internet persona to obtain your
    stolen designs & stolen software from the hardworking people
    on comp.cad.cadence and elsewhere.

    IP Address: 61.152.135.78
    Location: China [City: Shanghai, Shanghai]
    inetnum: 61.152.132.0 - 61.152.135.255
    netname: SHANGHAI-DATA-SOLUTION-CORP
    descr: Shanghai Data Solution Co.
    country: CHINA
    admin-c: ZY108-AP
    tech-c: ZY108-AP
    mnt-by: MAINT-CHINANET-SH
    changed: @mail.online.sh.cn 20030317
    status: ASSIGNED NON-PORTABLE
    source: APNIC
    person: Zhu Ying
    address: F18,819 West Beijing Road,Shanghai 200081
    phone: +86-21-52128580
    fax-no: +86-21-52128566
     
    keylinme, Apr 27, 2005
    #4
  5. Harryzhu

    keylinme Guest

    IP Address: 61.152.135.78
    Does any of this strike a bell?

    Shanghai Data Solution Co., Ltd.
    Shanghai Pudong Software Park
    498 Guoshoujing Rd
    Room 3301-3309, Room 3302-3306, Room 3313
    Zhang, YouQiang
    Telephone:021-50800818-118
    Fax:021-50800926
    Handphone:13601691374
    Email:
     
    keylinme, Apr 27, 2005
    #5
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