Suppose two modules mod1 and mod2 definitions are as follows: mod1 (output a); mod2 (input b); Assume that they are instantiated in module top and are conncted as follows: module top; wire i; mod1 m1 (i); mod2 m2 (i) endmodule The problem is that I needed to find this out dynamically through PLI routines within mod1 and mod2. That is, we should know if two ports are connected to each other at simulation time in PLI routines. The solution I used was using acc_handle_simulated_net function. I called a PLI routine within each mod1 and mod2 as follows: mod1 (output a); ... always begin $Save(a); end endmodule $Save PLI routine saves the simulation net handle of a in global memory. If we do this also in mod2, since the simulation net handle of a and b (b is in mod2) is the same, by comparing them we can find out that they are connected to each other (i.e they are on the same net). This is done by using the fact that simulators can make collapsed nets and simulation nets as described in IEEE 1364 standard. However, some simulators don't do this at all, or at some situations. For example, in cadence NCVerilog, if you use force in your always blocks, the simulator doesn't make simulation nets. So, my question is that given the handles of two wires in separate modules, is there any other way that we can find out if they are on the same net (i.e. connected to each other)? In other words, is there an equivalent function for acc_handle_simulated_net that always works? I would appreciate your answers. -Arash
