Help! Bus notation on schematics

Discussion in 'Cadence' started by JC, Oct 28, 2005.

  1. JC

    JC Guest

    Hi,

    Using the Cadence schematic tool, I have a cell instantiated 128 times,
    Icell1<127:0>.

    I want groups of 4 cells at the time to have the same input, so there will
    be 32 signals, x<31:0> going to 128 cells.

    I can label the bus to the input

    etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0>

    but it is a very long string.

    What is the syntax to abbreviate it, such as

    etc., ((x<1>) *4), ((x<0>) *4)

    or something even shorter such as

    bit=0; (((x<bit + 1>) *4) *32)



    Thanks,

    Joe
    joe.clark@
     
    JC, Oct 28, 2005
    #1
  2. Virtuoso Schematic Editor User Guide,
    Section: Multiple-Bit Wire Connections
    Section: Wire-to-Iterated Instance Connections
    Section: Multiple-Bit Wire Naming Conventions


    Bernd
     
    Bernd Fischer, Oct 28, 2005
    #2
  3. All:

    I defy anyone at Cadence to tell me exactly how bus ripping works.
    The documents below describe a subset legal bus definitions that work, but
    other esoteric combinations work.
    The custom memory group at my ex-employer used some pretty wild combinations
    that worked.
    As a matter of fact, they would write bus def's just like you describe them
    ( something like <4*i<31:0>> and they would get the bus you describe .. )
    I will ask former member of the group for the syntax he uses and post it!

    -- Gerry
     
    Gerry Vandevalk, Nov 1, 2005
    #3
  4. Oh, it's really not as complicated as all that! Starting with the one
    that is wanted, here's a variety of examples of varying complexity (the
    examples are followed with an representation of the sequence they
    expand to).

    Put simply - 0:n*m repeats each bit m times, whereas (0:n)*m repeats
    the whole 0:n range m times one after the other. Then you can concatenate
    them too, and further group them with parentheses, and so on.

    x<0:31*4>

    0,0,0,0,1,1,1,1,2,2,2,2....,31,31,31,31

    x<(0:31)*4>

    0,1,2,3,4,5,6,...31,0,1,2,3,4,5,6,...31,...

    x<(0:31*2)*2>

    0,0,1,1,2,2,3,3,...,31,31,0,0,1,1,2,2,3,3,...,31,31

    x<0:31*2,31:0*2>

    0,0,1,1,2,2,3,3,...,31,31,31,31,30,30,29,29,...,2,2,1,1,0,0

    x<(0:31,31:0)*2>

    0,1,2,3,4,...,31,31,30,29,...,2,1,0,0,1,2,3,4,...,31,31,30,29,...,2,1,0

    Regards,

    Andrew.
     
    Andrew Beckett, Nov 9, 2005
    #4
  5. Yes it can be easy, but you can nest them in complex ways and they still
    work.
    (negative counting works too in x<31:0> arrays or more complex like
    y<31:0:-2> (i think!) )

    by the way ... don't you mean

    x<0:31>*4

    expands to

    x<0>,x<0>,x<0>,x<0>,x<1>,x<1>, ... ,x<31>,x<31>

    etc.

    -- Gerry
     
    Gerry Vandevalk, Nov 13, 2005
    #5
  6. JC

    Joe Clark Guest

    Thanks for the answers and ideas, guys.

    Joe
     
    Joe Clark, Nov 15, 2005
    #6
  7. Hi,

    Maybe someone could clarify one more question in this thread, please.
    Is there is any possibility to deal with two-dimensional arrays of
    instances and wires?
    I have a 2D array of cells, and so far I could not find a way to
    instantiated it, rather than
    creating an additional component X- which is 1D array, and than creating
    an array of X's.

    And correspondingly is there a way to index wire in a 2D manner.

    Thank you.
    Alex
     
    Alexey Lopich, Apr 7, 2006
    #7
  8. Hi,

    Maybe someone could clarify one more question in this thread, please.
    Is there is any possibility to deal with two-dimensional arrays of
    instances and wires?
    I have a 2D array of cells, and so far I could not find a way to
    instantiated it, rather than
    creating an additional component X- which is 1D array, and than creating
    an array of X's.

    And correspondingly is there a way to index wire in a 2D manner.

    Thank you.
    Alex


    Virtuoso Schematic Editor User Guide,
    Section: Multiple-Bit Wire Connections
    Section: Wire-to-Iterated Instance Connections
    Section: Multiple-Bit Wire Naming Conventions


    Bernd

    JC wrote:
    Hi,
    Using the Cadence schematic tool, I have a cell instantiated 128 times,
    Icell1<127:0>.
    I want groups of 4 cells at the time to have the same input, so there
    will be 32 signals, x<31:0> going to 128 cells.
    I can label the bus to the input
    etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0>
    but it is a very long string.
    What is the syntax to abbreviate it, such as
    etc., ((x<1>) *4), ((x<0>) *4)
    or something even shorter such as
    bit=0; (((x<bit + 1>) *4) *32)
    Thanks,
    Joe
    joe.clark@
     
    Alexey Lopich, Apr 8, 2006
    #8
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