Connecting bus signals to gnd

I'm getting errors in Virtuoso schematic composer when I try to connect
signals on a bus to gnd. The errors are that the signals are shorted
to gnd and that they're shorted together. I was able to get rid of the
errors by putting a patch component (from basic library) between gnd
and each bus signal. However the patch causes an error when running
the "generate from source" command in the layout editor. I also tried
a 0 ohm resistor, which also got rid of the error in the schematic but
caused an error in layout. Any suggestions?

 

You can set your labels as 'alias' (there is a check-box when you create
the label). this avoids the error you are describing in the schematic ;
i don't know however how this is handled by the layout xl.

the other way to avoid this, which is cross-tool and most well-behaved,
is to avoid shorting nets together, only short pins (input pins). if you
want to short a net to ground (or whatever) then make a cell out of
what you have, with a pin for the net in question, then instantiate this
cell in a higher-level cell and short at your will. because your net
labels are in different levels in the hierarchy, there won't be any
clash, and any tool should be able to handle this.

stéphane

 

Thanks for the advice. I tried it out & it got rid of my errors.