Cadence, shortened net, global pins

Discussion in 'Cadence' started by StreAMnewal, Apr 14, 2010.

  1. StreAMnewal

    StreAMnewal Guest

    1) When I try to short pins such as vdda! with pin created by me I see
    errors.
    2) Also When I try to short pins vdda with vdde I see errors. What the
    problem?
    3) How crete global pins in schematic without making that on symbol? I
    need to use pins with same names in ierarchy.

    http://
    img685.imageshack.us/img685/1338/globalnetshortened.th.png


    How can I solve that problems?
     
    StreAMnewal, Apr 14, 2010
    #1
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