BuildGates5 LPS using TCF file

Hi,
im testing the LPS flow of BuildGates5 (s007) and my flow for tcf-file
based power optimized synthesis looks like the following:

- read design files
- do_build_generic -sleep_mode
- do_optimize -power -stop_after mapping
- do_optimize -power -stop_for_power_simulation
- write netlist
- gate-sim: create tcf-file
- read netlist and tcf file
- 1. report power (*)
- do_optimize -power (**)
- 2. report power (*)

During this flow, sleep mode logic and clock gating logic seems to be
added. but I don't get any power difference comparing the two
report_power commands (*). Also the do_optimize -power (**) does not
show any power-decrease.
Does anybody uses the LPS flow and has an idea, where the reason for
equal power reports could be?

Christoph

 

Is the standard cell library which you are using power characterized?

For example, our library is not power characterized. So there is no
difference in the power report produced by synthesis whether we use lps or
not.
To find out whether the library is power characterized have look at your tlf
library files: if there is only timing information the power
characterization is missing.

Kind regards,
Johannes Wolkerstorfer