Assura DRC problem of Guard ring

HI Friends,

I got some problem when conduction LVS using Assura. There is
some DRC error with the guard ring of NMOS
transistor(the pcell is from the library including the guard ring).

Rule No. 57 : substrate_StampErrorCon

This error is not shown when I only conduct Assura DRC. It only
comes up as a DRC error when LVS is conducted.

Thanks in advance,

Adam

 

Adam wrote, on 01/20/09 20:35:

I doubt anyone will be able to help you much unless you give some idea as to the
technology you're using, since this rule will be technology related.

However, most likely it's because the DRC rules do not check any connectivity.
The LVS rules however are extracting the connectivity, and whilst at it, they
are looking for substrate connectivity problems. Often rules check for
connections being made through the substrate - in other words, you might have a
substrate contact, connected to a supply (or ground, depending on the substrate
type), and then another substate contact where the metal is not connected to the
supply, but is connected to other devices - it means those devices are being
powered through a (rather poor) substrate connection.

Usually you want all substrate connections to be connected to the supply (or
ground) in metal, and never rely on a connection through the substrate,
otherwise you're drawing current through the substrate.

Hope that made sense - it would probably be easier with a picture, but my ASCII
art-layout skills are a bit ropey at this time of night ;-)

Regards,

Andrew.