Cadence

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  1. Ling Zhang

    how to recover the simulation result before the crash

    Ling Zhang, Aug 3, 2003
    Replies:
    0
    Views:
    865
    Ling Zhang
    Aug 3, 2003
  2. selvakumar_in

    write_techfile ?

    selvakumar_in, Jul 28, 2003
    Replies:
    2
    Views:
    529
    John Gianni
    Aug 2, 2003
  3. Erik Wanta

    ipc functions and Environment Vairables

    Erik Wanta, Aug 1, 2003
    Replies:
    0
    Views:
    661
    Erik Wanta
    Aug 1, 2003
  4. svenn.are

    Flashing colors when using XFree86 with IC5.0

    svenn.are, Jul 9, 2003
    Replies:
    10
    Views:
    970
    Harald Neubauer
    Aug 1, 2003
  5. INFO

    ISQED04, CALL FOR PAPERS

    INFO, Aug 1, 2003
    Replies:
    0
    Views:
    687
    INFO
    Aug 1, 2003
  6. lynto

    lmstat reliability?

    lynto, Jul 30, 2003
    Replies:
    1
    Views:
    669
    Andrew Beckett
    Jul 30, 2003
  7. cupric

    Computing slew rate through PSS analysis

    cupric, Jul 28, 2003
    Replies:
    2
    Views:
    917
    Andrew Beckett
    Jul 30, 2003
  8. Kuan Zhou

    Which journal should I choose?

    Kuan Zhou, Jul 28, 2003
    Replies:
    0
    Views:
    705
    Kuan Zhou
    Jul 28, 2003
  9. Karim

    Capacitor Layout in 0.18 um in Cadence

    Karim, Jul 24, 2003
    Replies:
    2
    Views:
    1,287
    Andrew Beckett
    Jul 28, 2003
  10. Boki

    How to draw an inductance?

    Boki, Jul 23, 2003
    Replies:
    1
    Views:
    714
    Andrew Beckett
    Jul 28, 2003
  11. Erik Wanta

    cadence calculator?

    Erik Wanta, Jul 11, 2003
    Replies:
    4
    Views:
    1,032
    Andrew Beckett
    Jul 28, 2003
  12. rmathur

    Tutorial for Cadence IC 4.4.6 set of tools

    rmathur, Jul 26, 2003
    Replies:
    2
    Views:
    854
    John Gianni
    Jul 28, 2003
  13. a

    Node capacitance?

    a, Jul 25, 2003
    Replies:
    1
    Views:
    1,689
    Erik Wanta
    Jul 25, 2003
  14. Thomas Popp

    How to determine capacitance of input pin with spectreS

    Thomas Popp, Jul 21, 2003
    Replies:
    8
    Views:
    838
    Marc Heise
    Jul 25, 2003
  15. pradeep

    signalscan view(modelsim) - content of memory array

    pradeep, Jul 25, 2003
    Replies:
    0
    Views:
    649
    pradeep
    Jul 25, 2003
  16. S. Badel

    problem simulating with standard cells

    S. Badel, Jul 16, 2003
    Replies:
    1
    Views:
    828
    Kholdoun TORKI
    Jul 20, 2003
  17. suresh j

    Making a particular layer of a cellview(layout) invisible in toplevel

    suresh j, Jul 17, 2003
    Replies:
    2
    Views:
    694
    Kholdoun TORKI
    Jul 18, 2003
  18. selvakumar_in

    layout_area

    selvakumar_in, Jul 18, 2003
    Replies:
    1
    Views:
    506
    Rajeswaran M
    Jul 18, 2003
  19. eda support guy

    analog artist window size

    eda support guy, Jul 17, 2003
    Replies:
    1
    Views:
    716
    Erik Wanta
    Jul 17, 2003
  20. willbi

    hierarchical POWER_GROUP

    willbi, Jul 17, 2003
    Replies:
    0
    Views:
    690
    willbi
    Jul 17, 2003
  21. Brian Leibowitz

    enforcing autoroute directions?

    Brian Leibowitz, Jul 17, 2003
    Replies:
    0
    Views:
    594
    Brian Leibowitz
    Jul 17, 2003
  22. yxl

    How to fix this problem in Synopsys?

    yxl, Jul 14, 2003
    Replies:
    2
    Views:
    650
    Ajeetha Kumari
    Jul 16, 2003
  23. Juan Felipe Osorio

    measureResistance Diva

    Juan Felipe Osorio, Jul 11, 2003
    Replies:
    2
    Views:
    750
    Edward J Kalenda
    Jul 15, 2003
  24. Kumar Yelamarthi

    Help req with Segmentation fault

    Kumar Yelamarthi, Jul 14, 2003
    Replies:
    1
    Views:
    1,301
    Edward J Kalenda
    Jul 15, 2003
  25. selvakumar_in

    how_to_add_instance

    selvakumar_in, Jul 12, 2003
    Replies:
    2
    Views:
    615
    [email protected]
    Jul 14, 2003
  26. Vikas Vijay

    pss beat frequency in Spectre-RF

    Vikas Vijay, Jul 14, 2003
    Replies:
    0
    Views:
    1,328
    Vikas Vijay
    Jul 14, 2003
  27. A.R. Sepulveda

    Help setting Cadence

    A.R. Sepulveda, Jul 9, 2003
    Replies:
    1
    Views:
    686
    Hristo Brachkov
    Jul 13, 2003
  28. selvakumar_in

    what_ is_ pdk

    selvakumar_in, Jul 12, 2003
    Replies:
    1
    Views:
    683
    Hristo Brachkov
    Jul 13, 2003
  29. Min Pan

    LVS between DFII schematic and layout using Assura

    Min Pan, Jul 9, 2003
    Replies:
    2
    Views:
    912
    Jay Lessert
    Jul 13, 2003
  30. Vicky

    ilim and ASW in spectre

    Vicky, Jul 9, 2003
    Replies:
    1
    Views:
    649
    Erik Wanta
    Jul 11, 2003
  31. Junmou Zhang

    Skill functions to Select Result in Analog Artist

    Junmou Zhang, Jul 11, 2003
    Replies:
    0
    Views:
    801
    Junmou Zhang
    Jul 11, 2003
  32. Min Pan

    Some offset between the metal interconnection and cells from Sillicon Ensemble to DFII Design Enviro

    Min Pan, Jul 10, 2003
    Replies:
    2
    Views:
    773
    Han Speek
    Jul 11, 2003
  33. selvakumar_in

    spectre_model_file

    selvakumar_in, Jul 10, 2003
    Replies:
    1
    Views:
    555
    Erik Wanta
    Jul 11, 2003
  34. Andreas Dreyfert

    Callback for instance parameters

    Andreas Dreyfert, Jul 9, 2003
    Replies:
    2
    Views:
    814
    Andreas Dreyfert
    Jul 10, 2003
  35. Mark Houlgate

    Defining Subcircuit Parameters

    Mark Houlgate, Jul 9, 2003
    Replies:
    0
    Views:
    795
    Mark Houlgate
    Jul 9, 2003
  36. tritue

    Mixed signal spectreSVerilog can not display digital waveform

    tritue, Jul 9, 2003
    Replies:
    0
    Views:
    720
    tritue
    Jul 9, 2003
  37. kavitha

    sourcelink support

    kavitha, Jul 8, 2003
    Replies:
    1
    Views:
    875
    Andrew Beckett
    Jul 8, 2003
  38. Naoki Kobayashi - Shinko

    AXL-SKILL Data Extract Functions

    Naoki Kobayashi - Shinko, Jul 8, 2003
    Replies:
    0
    Views:
    953
    Naoki Kobayashi - Shinko
    Jul 8, 2003
  39. kavitha

    IC4.4.6 on solaris(sparc version)with hspice

    kavitha, Jul 8, 2003
    Replies:
    1
    Views:
    868
    Bernd Fischer
    Jul 8, 2003
  40. Kuan Zhou

    AHDL vs. Veriloga

    Kuan Zhou, Jul 7, 2003
    Replies:
    1
    Views:
    877
    Erik Wanta
    Jul 8, 2003
  41. Dieter Tank

    Q: Orcad layout of multiple instances

    Dieter Tank, Jul 6, 2003
    Replies:
    0
    Views:
    1,140
    Dieter Tank
    Jul 6, 2003
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