Cadence

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  1. selvakumar_in

    modifying_drc

    selvakumar_in, Aug 5, 2003
    Replies:
    1
    Views:
    886
    S. Badel
    Aug 6, 2003
  2. Erik Wanta

    SKILL Progress Bar

    Erik Wanta, Aug 4, 2003
    Replies:
    2
    Views:
    1,272
    John Gianni
    Aug 6, 2003
  3. spias

    about first encounter

    spias, Aug 5, 2003
    Replies:
    0
    Views:
    1,059
    spias
    Aug 5, 2003
  4. cupric

    Simulating phase noise for PFD-CP

    cupric, Aug 4, 2003
    Replies:
    1
    Views:
    1,509
    Vikas Vijay
    Aug 5, 2003
  5. Badhrinath Jagannathan

    statistically variable parameters

    Badhrinath Jagannathan, Jul 9, 2003
    Replies:
    1
    Views:
    1,009
    Dionis
    Aug 3, 2003
  6. yogesh

    a humble request..pls help me

    yogesh, Aug 3, 2003
    Replies:
    0
    Views:
    994
    yogesh
    Aug 3, 2003
  7. Ling Zhang

    how to recover the simulation result before the crash

    Ling Zhang, Aug 3, 2003
    Replies:
    0
    Views:
    1,276
    Ling Zhang
    Aug 3, 2003
  8. selvakumar_in

    write_techfile ?

    selvakumar_in, Jul 28, 2003
    Replies:
    2
    Views:
    769
    John Gianni
    Aug 2, 2003
  9. Erik Wanta

    ipc functions and Environment Vairables

    Erik Wanta, Aug 1, 2003
    Replies:
    0
    Views:
    949
    Erik Wanta
    Aug 1, 2003
  10. svenn.are

    Flashing colors when using XFree86 with IC5.0

    svenn.are, Jul 9, 2003
    Replies:
    10
    Views:
    1,218
    Harald Neubauer
    Aug 1, 2003
  11. INFO

    ISQED04, CALL FOR PAPERS

    INFO, Aug 1, 2003
    Replies:
    0
    Views:
    939
    INFO
    Aug 1, 2003
  12. lynto

    lmstat reliability?

    lynto, Jul 30, 2003
    Replies:
    1
    Views:
    1,053
    Andrew Beckett
    Jul 30, 2003
  13. cupric

    Computing slew rate through PSS analysis

    cupric, Jul 28, 2003
    Replies:
    2
    Views:
    1,276
    Andrew Beckett
    Jul 30, 2003
  14. Kuan Zhou

    Which journal should I choose?

    Kuan Zhou, Jul 28, 2003
    Replies:
    0
    Views:
    1,009
    Kuan Zhou
    Jul 28, 2003
  15. Karim

    Capacitor Layout in 0.18 um in Cadence

    Karim, Jul 24, 2003
    Replies:
    2
    Views:
    1,668
    Andrew Beckett
    Jul 28, 2003
  16. Boki

    How to draw an inductance?

    Boki, Jul 23, 2003
    Replies:
    1
    Views:
    979
    Andrew Beckett
    Jul 28, 2003
  17. Erik Wanta

    cadence calculator?

    Erik Wanta, Jul 11, 2003
    Replies:
    4
    Views:
    1,499
    Andrew Beckett
    Jul 28, 2003
  18. rmathur

    Tutorial for Cadence IC 4.4.6 set of tools

    rmathur, Jul 26, 2003
    Replies:
    2
    Views:
    1,219
    John Gianni
    Jul 28, 2003
  19. a

    Node capacitance?

    a, Jul 25, 2003
    Replies:
    1
    Views:
    2,133
    Erik Wanta
    Jul 25, 2003
  20. Thomas Popp

    How to determine capacitance of input pin with spectreS

    Thomas Popp, Jul 21, 2003
    Replies:
    8
    Views:
    1,222
    Marc Heise
    Jul 25, 2003
  21. pradeep

    signalscan view(modelsim) - content of memory array

    pradeep, Jul 25, 2003
    Replies:
    0
    Views:
    970
    pradeep
    Jul 25, 2003
  22. S. Badel

    problem simulating with standard cells

    S. Badel, Jul 16, 2003
    Replies:
    1
    Views:
    1,136
    Kholdoun TORKI
    Jul 20, 2003
  23. suresh j

    Making a particular layer of a cellview(layout) invisible in toplevel

    suresh j, Jul 17, 2003
    Replies:
    2
    Views:
    993
    Kholdoun TORKI
    Jul 18, 2003
  24. selvakumar_in

    layout_area

    selvakumar_in, Jul 18, 2003
    Replies:
    1
    Views:
    728
    Rajeswaran M
    Jul 18, 2003
  25. eda support guy

    analog artist window size

    eda support guy, Jul 17, 2003
    Replies:
    1
    Views:
    1,003
    Erik Wanta
    Jul 17, 2003
  26. willbi

    hierarchical POWER_GROUP

    willbi, Jul 17, 2003
    Replies:
    0
    Views:
    948
    willbi
    Jul 17, 2003
  27. Brian Leibowitz

    enforcing autoroute directions?

    Brian Leibowitz, Jul 17, 2003
    Replies:
    0
    Views:
    830
    Brian Leibowitz
    Jul 17, 2003
  28. yxl

    How to fix this problem in Synopsys?

    yxl, Jul 14, 2003
    Replies:
    2
    Views:
    995
    Ajeetha Kumari
    Jul 16, 2003
  29. Juan Felipe Osorio

    measureResistance Diva

    Juan Felipe Osorio, Jul 11, 2003
    Replies:
    2
    Views:
    1,075
    Edward J Kalenda
    Jul 15, 2003
  30. Kumar Yelamarthi

    Help req with Segmentation fault

    Kumar Yelamarthi, Jul 14, 2003
    Replies:
    1
    Views:
    1,919
    Edward J Kalenda
    Jul 15, 2003
  31. selvakumar_in

    how_to_add_instance

    selvakumar_in, Jul 12, 2003
    Replies:
    2
    Views:
    830
    [email protected]
    Jul 14, 2003
  32. Vikas Vijay

    pss beat frequency in Spectre-RF

    Vikas Vijay, Jul 14, 2003
    Replies:
    0
    Views:
    1,689
    Vikas Vijay
    Jul 14, 2003
  33. A.R. Sepulveda

    Help setting Cadence

    A.R. Sepulveda, Jul 9, 2003
    Replies:
    1
    Views:
    976
    Hristo Brachkov
    Jul 13, 2003
  34. selvakumar_in

    what_ is_ pdk

    selvakumar_in, Jul 12, 2003
    Replies:
    1
    Views:
    971
    Hristo Brachkov
    Jul 13, 2003
  35. Min Pan

    LVS between DFII schematic and layout using Assura

    Min Pan, Jul 9, 2003
    Replies:
    2
    Views:
    1,388
    Jay Lessert
    Jul 13, 2003
  36. Vicky

    ilim and ASW in spectre

    Vicky, Jul 9, 2003
    Replies:
    1
    Views:
    995
    Erik Wanta
    Jul 11, 2003
  37. Junmou Zhang

    Skill functions to Select Result in Analog Artist

    Junmou Zhang, Jul 11, 2003
    Replies:
    0
    Views:
    1,098
    Junmou Zhang
    Jul 11, 2003
  38. Min Pan

    Some offset between the metal interconnection and cells from Sillicon Ensemble to DFII Design Enviro

    Min Pan, Jul 10, 2003
    Replies:
    2
    Views:
    1,007
    Han Speek
    Jul 11, 2003
  39. selvakumar_in

    spectre_model_file

    selvakumar_in, Jul 10, 2003
    Replies:
    1
    Views:
    804
    Erik Wanta
    Jul 11, 2003
  40. Andreas Dreyfert

    Callback for instance parameters

    Andreas Dreyfert, Jul 9, 2003
    Replies:
    2
    Views:
    1,180
    Andreas Dreyfert
    Jul 10, 2003
  41. Mark Houlgate

    Defining Subcircuit Parameters

    Mark Houlgate, Jul 9, 2003
    Replies:
    0
    Views:
    1,068
    Mark Houlgate
    Jul 9, 2003
  42. tritue

    Mixed signal spectreSVerilog can not display digital waveform

    tritue, Jul 9, 2003
    Replies:
    0
    Views:
    1,048
    tritue
    Jul 9, 2003
  43. kavitha

    sourcelink support

    kavitha, Jul 8, 2003
    Replies:
    1
    Views:
    1,143
    Andrew Beckett
    Jul 8, 2003
  44. Naoki Kobayashi - Shinko

    AXL-SKILL Data Extract Functions

    Naoki Kobayashi - Shinko, Jul 8, 2003
    Replies:
    0
    Views:
    1,268
    Naoki Kobayashi - Shinko
    Jul 8, 2003
  45. kavitha

    IC4.4.6 on solaris(sparc version)with hspice

    kavitha, Jul 8, 2003
    Replies:
    1
    Views:
    1,196
    Bernd Fischer
    Jul 8, 2003
  46. Kuan Zhou

    AHDL vs. Veriloga

    Kuan Zhou, Jul 7, 2003
    Replies:
    1
    Views:
    1,239
    Erik Wanta
    Jul 8, 2003
  47. Dieter Tank

    Q: Orcad layout of multiple instances

    Dieter Tank, Jul 6, 2003
    Replies:
    0
    Views:
    1,497
    Dieter Tank
    Jul 6, 2003
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