Cadence

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  1. Erik Wanta

    SKILL Progress Bar

    Erik Wanta, Aug 4, 2003
    Replies:
    2
    Views:
    1,102
    John Gianni
    Aug 6, 2003
  2. spias

    about first encounter

    spias, Aug 5, 2003
    Replies:
    0
    Views:
    1,014
    spias
    Aug 5, 2003
  3. cupric

    Simulating phase noise for PFD-CP

    cupric, Aug 4, 2003
    Replies:
    1
    Views:
    1,397
    Vikas Vijay
    Aug 5, 2003
  4. Badhrinath Jagannathan

    statistically variable parameters

    Badhrinath Jagannathan, Jul 9, 2003
    Replies:
    1
    Views:
    967
    Dionis
    Aug 3, 2003
  5. yogesh

    a humble request..pls help me

    yogesh, Aug 3, 2003
    Replies:
    0
    Views:
    950
    yogesh
    Aug 3, 2003
  6. Ling Zhang

    how to recover the simulation result before the crash

    Ling Zhang, Aug 3, 2003
    Replies:
    0
    Views:
    1,187
    Ling Zhang
    Aug 3, 2003
  7. selvakumar_in

    write_techfile ?

    selvakumar_in, Jul 28, 2003
    Replies:
    2
    Views:
    734
    John Gianni
    Aug 2, 2003
  8. Erik Wanta

    ipc functions and Environment Vairables

    Erik Wanta, Aug 1, 2003
    Replies:
    0
    Views:
    890
    Erik Wanta
    Aug 1, 2003
  9. svenn.are

    Flashing colors when using XFree86 with IC5.0

    svenn.are, Jul 9, 2003
    Replies:
    10
    Views:
    1,177
    Harald Neubauer
    Aug 1, 2003
  10. INFO

    ISQED04, CALL FOR PAPERS

    INFO, Aug 1, 2003
    Replies:
    0
    Views:
    902
    INFO
    Aug 1, 2003
  11. lynto

    lmstat reliability?

    lynto, Jul 30, 2003
    Replies:
    1
    Views:
    978
    Andrew Beckett
    Jul 30, 2003
  12. cupric

    Computing slew rate through PSS analysis

    cupric, Jul 28, 2003
    Replies:
    2
    Views:
    1,177
    Andrew Beckett
    Jul 30, 2003
  13. Kuan Zhou

    Which journal should I choose?

    Kuan Zhou, Jul 28, 2003
    Replies:
    0
    Views:
    926
    Kuan Zhou
    Jul 28, 2003
  14. Karim

    Capacitor Layout in 0.18 um in Cadence

    Karim, Jul 24, 2003
    Replies:
    2
    Views:
    1,563
    Andrew Beckett
    Jul 28, 2003
  15. Boki

    How to draw an inductance?

    Boki, Jul 23, 2003
    Replies:
    1
    Views:
    930
    Andrew Beckett
    Jul 28, 2003
  16. Erik Wanta

    cadence calculator?

    Erik Wanta, Jul 11, 2003
    Replies:
    4
    Views:
    1,355
    Andrew Beckett
    Jul 28, 2003
  17. rmathur

    Tutorial for Cadence IC 4.4.6 set of tools

    rmathur, Jul 26, 2003
    Replies:
    2
    Views:
    1,136
    John Gianni
    Jul 28, 2003
  18. a

    Node capacitance?

    a, Jul 25, 2003
    Replies:
    1
    Views:
    1,989
    Erik Wanta
    Jul 25, 2003
  19. Thomas Popp

    How to determine capacitance of input pin with spectreS

    Thomas Popp, Jul 21, 2003
    Replies:
    8
    Views:
    1,134
    Marc Heise
    Jul 25, 2003
  20. pradeep

    signalscan view(modelsim) - content of memory array

    pradeep, Jul 25, 2003
    Replies:
    0
    Views:
    904
    pradeep
    Jul 25, 2003
  21. S. Badel

    problem simulating with standard cells

    S. Badel, Jul 16, 2003
    Replies:
    1
    Views:
    1,091
    Kholdoun TORKI
    Jul 20, 2003
  22. suresh j

    Making a particular layer of a cellview(layout) invisible in toplevel

    suresh j, Jul 17, 2003
    Replies:
    2
    Views:
    945
    Kholdoun TORKI
    Jul 18, 2003
  23. selvakumar_in

    layout_area

    selvakumar_in, Jul 18, 2003
    Replies:
    1
    Views:
    684
    Rajeswaran M
    Jul 18, 2003
  24. eda support guy

    analog artist window size

    eda support guy, Jul 17, 2003
    Replies:
    1
    Views:
    959
    Erik Wanta
    Jul 17, 2003
  25. willbi

    hierarchical POWER_GROUP

    willbi, Jul 17, 2003
    Replies:
    0
    Views:
    903
    willbi
    Jul 17, 2003
  26. Brian Leibowitz

    enforcing autoroute directions?

    Brian Leibowitz, Jul 17, 2003
    Replies:
    0
    Views:
    788
    Brian Leibowitz
    Jul 17, 2003
  27. yxl

    How to fix this problem in Synopsys?

    yxl, Jul 14, 2003
    Replies:
    2
    Views:
    938
    Ajeetha Kumari
    Jul 16, 2003
  28. Juan Felipe Osorio

    measureResistance Diva

    Juan Felipe Osorio, Jul 11, 2003
    Replies:
    2
    Views:
    1,031
    Edward J Kalenda
    Jul 15, 2003
  29. Kumar Yelamarthi

    Help req with Segmentation fault

    Kumar Yelamarthi, Jul 14, 2003
    Replies:
    1
    Views:
    1,794
    Edward J Kalenda
    Jul 15, 2003
  30. selvakumar_in

    how_to_add_instance

    selvakumar_in, Jul 12, 2003
    Replies:
    2
    Views:
    783
    [email protected]
    Jul 14, 2003
  31. Vikas Vijay

    pss beat frequency in Spectre-RF

    Vikas Vijay, Jul 14, 2003
    Replies:
    0
    Views:
    1,623
    Vikas Vijay
    Jul 14, 2003
  32. A.R. Sepulveda

    Help setting Cadence

    A.R. Sepulveda, Jul 9, 2003
    Replies:
    1
    Views:
    931
    Hristo Brachkov
    Jul 13, 2003
  33. selvakumar_in

    what_ is_ pdk

    selvakumar_in, Jul 12, 2003
    Replies:
    1
    Views:
    921
    Hristo Brachkov
    Jul 13, 2003
  34. Min Pan

    LVS between DFII schematic and layout using Assura

    Min Pan, Jul 9, 2003
    Replies:
    2
    Views:
    1,274
    Jay Lessert
    Jul 13, 2003
  35. Vicky

    ilim and ASW in spectre

    Vicky, Jul 9, 2003
    Replies:
    1
    Views:
    918
    Erik Wanta
    Jul 11, 2003
  36. Junmou Zhang

    Skill functions to Select Result in Analog Artist

    Junmou Zhang, Jul 11, 2003
    Replies:
    0
    Views:
    1,055
    Junmou Zhang
    Jul 11, 2003
  37. Min Pan

    Some offset between the metal interconnection and cells from Sillicon Ensemble to DFII Design Enviro

    Min Pan, Jul 10, 2003
    Replies:
    2
    Views:
    969
    Han Speek
    Jul 11, 2003
  38. selvakumar_in

    spectre_model_file

    selvakumar_in, Jul 10, 2003
    Replies:
    1
    Views:
    746
    Erik Wanta
    Jul 11, 2003
  39. Andreas Dreyfert

    Callback for instance parameters

    Andreas Dreyfert, Jul 9, 2003
    Replies:
    2
    Views:
    1,118
    Andreas Dreyfert
    Jul 10, 2003
  40. Mark Houlgate

    Defining Subcircuit Parameters

    Mark Houlgate, Jul 9, 2003
    Replies:
    0
    Views:
    1,024
    Mark Houlgate
    Jul 9, 2003
  41. tritue

    Mixed signal spectreSVerilog can not display digital waveform

    tritue, Jul 9, 2003
    Replies:
    0
    Views:
    971
    tritue
    Jul 9, 2003
  42. kavitha

    sourcelink support

    kavitha, Jul 8, 2003
    Replies:
    1
    Views:
    1,104
    Andrew Beckett
    Jul 8, 2003
  43. Naoki Kobayashi - Shinko

    AXL-SKILL Data Extract Functions

    Naoki Kobayashi - Shinko, Jul 8, 2003
    Replies:
    0
    Views:
    1,189
    Naoki Kobayashi - Shinko
    Jul 8, 2003
  44. kavitha

    IC4.4.6 on solaris(sparc version)with hspice

    kavitha, Jul 8, 2003
    Replies:
    1
    Views:
    1,103
    Bernd Fischer
    Jul 8, 2003
  45. Kuan Zhou

    AHDL vs. Veriloga

    Kuan Zhou, Jul 7, 2003
    Replies:
    1
    Views:
    1,151
    Erik Wanta
    Jul 8, 2003
  46. Dieter Tank

    Q: Orcad layout of multiple instances

    Dieter Tank, Jul 6, 2003
    Replies:
    0
    Views:
    1,441
    Dieter Tank
    Jul 6, 2003
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